EARN’ 2015 is the result of cooperation project between CES lab-ENIS/Crns-SfaxTechnopol/KACST-KSA since 2014. The main objectives of this project are to explore and to develop novel architectures using state-of-the-art FPGA and ultra-low power deep sub-micron Application Specific Integrated Circuit (ASIC)/SoC technologies.

The developed architecture will focus on offloading the compute intensive processing task from the processor to the augmented reconfigurable coprocessor and achieve high energy efficiency.

Attached files

  • EARN 2015